quadrature rotary encoder to inc and dec buttons

[cyborg0 at GlobalEyes.net]

Ok.. your all not gonna believe this... I want to cry now..
I WILL still post my original.. BUT, there is a  ONE CHIP solution for
this..its at www.usdigital.com..boohohohohboooo... :((

For one, your flop needs to be edge triggered, as does the clock..Otherwise
it will get far too complex too quickly and youll need a billion gates..

Ok, now, the flip flop triggers on the leading edge of either A or B..then
the other secret is make a pulse generator with an inverter by putting a cap
in line with a resistor to gnd on the input..

Next, hint #3, remember that you dont neccesarily need to use BOTH A and B to
supply output.. one could be the DATA (A) and the other could be a SELECTOR..
This worked ok with a D-flop..

Another item to remember is that really everything about you circuit really
hinges on your circuits ability to determine how many pulses have come and
this can be controlled on the clk input..

The hardest part was realizing that you first get ONE positive edge (a), then
you want to count one more (on the B output) and then count the following
edge of the lagging input and THEN allow the counter to reset. Then, on
cnt=0, we allow the next leading input to set the flop, then cnt=1, lagging
pos edge, cnt=2, then lagging neg edge, cnt=0..This continues ad
nauseam...you use the outputs of the flop to enable which AND gates will be
allowed to pass the incremental data..

Ok.. enough.. sorry for the long post.. go the the guys at us digital and
look at the output of the one chip wonder they have...Thats gives you an idea
of what occurs..
rob


Adrian Corston wrote:

> cyborg0 at GlobalEyes.net types:
> >Ok, well, I figgered out how to convert the 90 degree out of phase A and
> >B outputs of  a panasonic rotary encoder knob to trigger properly..No
> [...]
>
> I'm very interested in your solution! Will you post a schematic at some
> stage?
>
> --
> Adrian Corston
> Internet Engineer
> Internode Professional Access