VC delay module ideas?
Arthur Harrison
theremin1 at worldnet.att.net
Sun Nov 1 13:20:15 CET 1998
I have a Panasonic BBD manual that cites the part numbers MN3101,
MN3102, and MN3105 as clock driver ICs , each respectively suited
for the various types of BBDs. In each of the block diagrams for these
parts,
there is a section marked "Wave Forming." However, there are no
specifications for the outputs' timing relationship! Each of
these ICs also have a Vgg bias output feature to supply the BBD.
One quick method for making non-overlapping clocks is to run a CD4017
10-stage counter from a clock, and then connect the appropriate outputs
to a couple of FFs (CD4013, for example). An iteration of this
scheme will yield a pair of rectangular waves with a 40/60 duty cycle, and
180 degrees out of phase with each other.
-Art
-----Original Message-----
From: Haible Juergen <Juergen.Haible at nbgm.siemens.de>
To: DIY <synth-diy at mailhost.bpa.nl>; Fraser, Colin J
<Colin.Fraser at scottishpower.plc.uk>
Date: Friday, October 30, 1998 8:23 AM
Subject: AW: VC delay module ideas?
> >The design I have has a very small delay between the end of one
>pulse and
> >the start of the complementary pulse - this is supposed to be
>required for
> >the correct operation of the BBD, ie the switches before and after
>each
> >'bucket' must not be on at the same time.
> >
> >Is this not the case ?
>
>Good question !
>I've heard this, too, and I have seen more or less complicated designs
>that take this into account somehow. I've also seen plenty of simple 4013
>circuits, built two of them myself, so it definetly works. But I don't
>know if I loose something (decreased SNR, increased insertion loss ?)
>or not.
>Both clock lines being not allowed to be active at the same time makes
>sense. A Flipflop should do this. But why the gaps (delays) ?
>I guess (but I don't know) it's because of the high capacitive load that
>this bunch of MOS gates form together. So both rising and falling
>edges of the clock would have increased slew rate, and there would
>be some overlap. Haven't calculated anything, but it surely will grow
>worse with longer BBD lines. Maybe that's why you often find simple
>4013's (or just the complementary outputs of a discreet astable
>multivibrator) on short lines, and high current buffers or even special
>circuits for longer lines.
>When the Panasonic chips were introduced, there was this cheap,
>special clock chip (forgot the part number), so that you didn't need
>to go discreet or standard CMOS, even for short lines. Don't know if
>this has the gaps between the clocks or not. But this chip is not
>that good for wide range VCOs, I think. Roland has built a handful
>of transistors around the chip even for chorus applications.
>
>If someone is going to make measurements / comparison regarding
>gaps in the dual clock scheme, I'm interested in the results !
>
>JH.
>
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