clock divider
Ken Stone
sasami at blaze.net.au
Fri May 22 01:34:18 CEST 1998
Use a single 4017 set so it divides by three (output 3 wired to reset). Use
a 4024 with its clock connected to output 0 of the 4017 to give 1/4,1/2 and
1/1 pulses (Q0,Q1&Q2). Your 1/8 output will be the signal you are feeding
into the clock of the 4024 and will have 1/3 duty cycle, and all others will
be square waves.
I haven't tested this in this application of course, but have often used
this circuit in other instances. Also note that I refer to the divider stage
outputs, NOT to the pin numbers of the chips.
>OK I gave it a shot, and tried to use the 4017 chip to divide the 24ppq
>signal from sync. I basicaly chained 5 of them together to get me 1/16,
>1/8, 1/4, 1/2, and 1/1 notes. However that totaly bombed :( maybe it has
>something to do with the way these chips switch to logic 1 or something?
>Actually i have no idea. has anybody succesfully built a clk div with
>these chips? Or are there better chips out there to do it with? Another
>thing, I layed a 4017 out on my breadboard to experiemnt with it, by just
>sending the logic signals to different led's, to see how that worked.
>Then i took my SH-101 (only thing have that sends gate) and used it as an
>input. after a couple passes through the sequence, I would notice that
>the chip would crash, until I reset itb by turning the power off. Any
>ideas of why that was happening?
>
>thanks for the help
>
>Cheers
>
>Yoshi
>
>
>
>
_____________________________________________________________
Ken Stone sasami at blaze.net.au
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<http://www.anime.net/~kens/>
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<http://www.blaze.net.au/~sasami/>
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