VCOs & Tempco

[Ingo Debus]

Fraser, Colin J wrote:
> All cvs will be generated by a processor, so it seemed sensible to
> dispense with the exponential convertors if it can be done in software.
> I've thought about software envelopes etc. but decided against these on
> the grounds that I've never heard a synth with them that I liked the
> sound of (not to say it can't be done - I've just not heard one).

If you're using a microprocessor anyway, what about "hybrid" envelope
generators? The analog hardware is just a processor-controlled resistor
(a Xicor chip maybe), a capacitor and two comparators. One processor
generated control voltage (being the "asymptote" level) charges the cap
via the resistor. The comparators are fed with another control voltage,
the threshold level. They detect if the voltage across the cap is
higher/lower than the threshold, and if it is, a processor interrupt is
generated. Then the processor sets new values for resistance, asymptote
and threshold.

This is much more flexible than conventional ADSRs, since you can have
as many envelope stages you like, even loops, and the threshold and the
asymptote can be set independently. Still you need only three analog
outputs per EG for the processor.

The processor is only needed when another envelope stage begins. The
minimum envelope rate is not determined by processor speed. If the
processor doesn't react fast enough, only the thresholds will be
affected, not the rates.

A linear EG could be implemented in a similar manner, using a processor
controlled current source instead of a controlled resistor.

Any comments on this?

Ingo