Battery Backup for CMOS RAM

[Joachim Verghese]

Edward Leckie wrote:

> Does anybody know any cheap and simple methods of implementing battery
> backup for CMOS RAM (i.e. not requiring a MAX690 or any other expensive
> Maxim or Dallas components)?

The basic concept is to "OR" the +5V supply with the battery's
positive electrode (negative to gnd), and drive the RAM chip off
the resulting voltage.

You could use a pair of diodes for the OR function, but this method
poses a problem: In normal operation, the RAM will be supplied with
+4.3V (approx.) because of the diode voltage drop, while the bus
signals can go as high as +5V (especially if you have other CMOS bus
devices in the system). This may activate the RAM chip's input
protection diodes -- an undesireable effect under normal operating
conditions.

In addition, it is highly desirable to have a mechanism which forces
the Chip Select pin of the RAM chip high (inactive) whenever the +5V
supply falls below a certain trip point. This is to prevent data loss
at low supply voltages due to spurious actions of the microprocessor.

I think I have a circuit somewhere that satisfies the above
requirements, and uses a pair of transistors and a 74HC gate chip,
if I remember correctly. I'll try to make a scan within the next
few days.

-joachim