AW: VC envelopes

Haible Juergen Juergen.Haible at nbgm.siemens.de
Tue Jun 9 16:34:02 CEST 1998


	>In the mean time, I experimented with some lag circuits, and came
up
	>with one that seems to work pretty well. The report can be found
at:
	>
> http://www.netcontrol.fi/~jocke/circuits/vclag.html
	>
	>Or if you just want to view the (hand drawn) schematic:
	>
> http://www.netcontrol.fi/~jocke/circuits/vclag3.gif
	>
	>-joachim

Excellent !
Now I see what you meant by replacing some transistors with a 3080. You
still need switching of the various time CV inputs if you build an ADSR
around this circuit. For a Minimmog- or SEM-like ADS, maybe
the "sign" signal can take this part ...

Do you see any oscillation of the rectifier opamp when the slope reaches its
steady state? It would be filtered out by the integrator,
but I'd expect some internal oscillation with a loop around a sign /
polarity circuit ...

JH. 




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