Memory man or similar

[Steven Curtin]

At 11:08 AM 2/26/98 +0200, you wrote:
>One interesting looking digital delay is the circuit published
>in Electronics and Wireless World in Dec 86, a member of this
>list on the other side of the globe (where they use to walk upside
>down, you know) has built (and of course modified) one, here's the link:
>
> http://www.all-electric.com/ddl.htm

Nice little circuit!   The Deltalab Effectron also used sigma-delta
techniques I think.

There was also a digital delay circuit published in May/June 1980 issue of
Polyphony.  It's based on an 8-bit parallel DAC which was what one could
get at the time, but is another circuit to check out.

These days a lot of the jellybean TTL logic for a project like this could
be rolled into a gate array or PLD.  I've started trying things out with a
great little $100 xPLD eval board sold by Philips- it includes free
development software and a cable for downloading that works with the
parallel port on a PC.  The tech support is good too, helping me out when
it turned out eventually that I had a bad parallel port card.  There's no
reference for the XPL language that it uses, but there are lots of example
files you can modify and book stores have a number of good introductory
texts on PLDs and FPGAs.

check it out:

http://www.coolpld.com/

Steve C

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Steven Curtin  
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Lucent Technologies - Bell Labs Innovations
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