AW: FETs on the ASM-1 VCO.

[Haible Juergen]

	> I was a little concerned,
	> though, about possible instabilites in U1A resulting from C1's
direct
	> connection
	> to its output. 

No, it's perfect the way Joachim has done it. There is a
certain *range* of capacitance values that will make an
opamp instable. You can either stay below that range
(very small cap), or go above that range (very large
cap). Think of it as a 2-pole filter, one pole being the
internal compensation cap, and the second one being
formed by the output resistance and the capacitive load.
It's only when the two poles are relativly close together
that you get high Q factors, and thus overshot or
oscillation.
Normally you don't have much choice, of course: You will
use low capacitive load when the opamp output voltage
has to change fast, and high capacitance when you want
to bypass a constant voltage.
It's the same principle with voltage regulators: They even
*need* a certain capacitive load to be stable !

	> Can C1 be moved across R6, instead, or does the transient
	> response of Q1's source node degrade too much? 

This would give you a good reference voltage at the opamp
input. But at the output, it would only be good at low frequencies.
For higher frequencies, the internal gain of the opamp goes
down, and thus the output resistance of the closed loop goes up.
With the cap at the output, you have the precision buffer of the
opamp at low frequencies, plus the low impedance of the 10u 
at high frequencies.

JH.