MIDI devices

[Magnus Danielson]

>>>>> "W" == WeAreAs1  <WeAreAs1 at aol.com> writes:

Hi!

 W> In a message dated 8/24/98 11:00:07 AM, you wrote:

 W> <<BTW does anyone know why they used a 25-PIN parallel
 W> printer connector on the MPU-IPC box? Seems like WAY to many lines... (The
 W> MIDIman only needs 9!)
 >>> 

 W> It's because the MPU-IPC system also includes some extras (besides MIDI) such
 W> as FSK Tape Sync In/Out and an audio Click signal (some other stuff, too - I
 W> can't remeber at this moment, though)

>From Chapter 2 of MPU-401 Midi Processing Unit Technical Reference
Manual Version 1.5 5/29/85 (that is, blitzing new :) comes the
following pinassignments:

Signal	Pin #	Direction
D0	1	I/O
D1	14	I/O
D2	2	I/O
D3	15	I/O
D4	3	I/O
D5	16	I/O
D6	4	I/O
D7	17	I/O
A0	5	I
A1	18	I
A2	6	I
RD*	9	I
WR*	22	I
CS*	10	I
DSR*	23	O
RES*	11	I
+5Vdc	12&24	I
GND	13&25	I

Signals with * are active low.

DSR* (Data Set Ready) output is Open Collector and is usually
connected to the host system interrupt system.

The ISA card will buffer the signals (A0, A1, A2, RD*, WR*, RES*) from
the bus and the data buss will be sent through a bidirectional
transciever. A 74LS244 and a 74LS245 will perform thise task well.
I assume that the ISA signals IORD* and IOWR* can be directly
used. The 245 will have it's direction default as being out from the
bus and only when CS* and IORD* gets active simultaniously will it be
reversed. The CS* will then be connected to the OE* (pin 19) of the
245 where as the IORD* is connected to the DIR input (pin 1). For this
to work will the ISA bus be connected to the A-side (pin 2-9) and the
contact to the MPU-401 to the B-side (pin 18-11). We still want the
CS* to be generated. This is done with a 74LS688 which compares the
address A9-A3 and the ANDed result of IORD* and IOWR* with the fixed
pattern 11000000 giving the CS* on pin 19. We would also like to
isolate the DSR* signal, this can be done by using a 74LS09 AND gate,
another is being used for ANDing the IORD* and IOWR* for the CS*
generation. The buffered DSR* signal is being hooked to the IRQ2 line.

Let's see, the chipcount is now:
1	74LS244
1	74LS245
1	74LS688
1	74LS09

Add to this:
Some resistors (pullup for the Open Collector input as well as
standard input protection).
Some capacitors (power decoupling and input protection).
25-pin D-sub connector.

And you have replaced the missing card to make that MPU-401 running
with all kinds of software on your PC. Who ever said that ISA was complex?

 W> <<They didn't make a version that connects to the parallel port, did they?
 W> That would expalin the connector at least.>>

 W> No, they didn't.

Giving up on compability with exsisting code you could probably get it
working with many bidirectional and almost bindirectional parallel
ports. Even the original parallel port where a wire away from being
directional and rumours says that they intended it to bethat but they
withdraw this very late in the design and hardwired it to
unidirectional (the LS245 was there and a spare pin on a register was
left hanging loose, just a wire would be needed to control the DIR pin).

MAybe not very analog and originally not intended to be DIY but now we
at least got the later in on this thread ;)

PS. Bill, send that MPU-401 my way ;)

Cheers,
Magnus