4007 (was: Re: DIY parts)

[Ken Stone]

Gate to gate coupling within chips is not uncommon. In a commercial design I
did years ago I was having this problem with either a CMOS chip or a quad
comparator (I forget which). In this case I was able to solve the problem by
using a 1uf capacitor (not an electro) across the power rails close to the
chip. Nowdays, I always decouple all of my CMOS chips with 100nF capacitors.

>JH said:
>
>It's no good idea to have the discharge circuitry of several
>VCOs too close together. Your always fighting "interlock",
>i.e. a limited minimum beat rate between VCOs, before they
>are syncronized (soft sync'ed) thru parasitic coupling.
>
>
>
>This is so true. But this weekend I found another example of this sort of
>thing in a high level circuit. I had a schmitt trigger CMOS chip squaring
>the ramp output of a CEM3340 to give me a square wave. But I could hear it
>clicking at the beat frequency with the other VCO. I traced it to the
>another gate within the same CMOS chip. This gate was being fired from the
>pulse output from the second VCO. Gate to gate crosstalk, and bad enough to
>delay the change of state in one of the gates. The problem was solved by
>using the gates on opposite quarters of the same chip.
>
>Regards,
>
>Tony Allgood, Cumbria, UK
>
>e-mail: oakley at enterprise.net
>
>Rack mounted Moog VCF module. PCBs have been ordered.
>
>http://aupe.phys.andrews.edu/diy_archive/schematics/effects/filter.html
>
>
>
>
>
_____________________________________________________________

                Ken Stone  sasami at blaze.net.au
                   ** Catgirl Paradise **
               <http://www.anime.net/~kens/>
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             <http://www.blaze.net.au/~sasami/>
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