commercial synth circuits

[terry michaels]

-------------Forwarded Message-----------------

From:   terry michaels, 
To:     INTERNET:ijfritz at earthlink.net, INTERNET:ijfritz at earthlink.net
        
Date:   8/9/98  5:45 PM

RE:     Re: commercial synth circuits

Hi Ian

I chose the KE4859 primarily because of its low on resistance. FET leakage
is also important.   At the time I designed this circuit (October 1973),
this part was the best choice I could find that was easily available.  It
was sold by National Semiconductor, and I could buy National parts over the
counter here in Milwaukee.  The combination of this part, the .0024 cap,
and the CA3130 slew rate and settling time yields a sawtooth flyback time
of less than 2 microseconds, as recently measured on modern test equipment.
 Since the flyback time is a source of frequency error at the higher ranges
of the VCO, I sought to minimize it by using the KE4859.  I am currently
redesigning all of my synth circuits, and I will get to this one soon.  I
will look at currently available parts, and I will be happy to let you know
what I find as a modern replacement. 

I do not prefer the resistance in series with the timing cap method of
high-end compensation.  The steady state voltage drop across the resistor
at high frequencies alters the end points of the sawtooth waveform. This in
turn affects the purity of the other waveforms usually derived from the
sawtooth.  However, it has the benefit of accomplishing high-end
compensation very simply, with only one component. This comes down to
personal design philosophy and goals.  Mine is generally to achieve the
best performing, most precise circuits, with only a secondary consideration
to the number of components needed.  I recognize the desire of others to
create simple, inexpensive designs, and there is clearly a need out there
for that design approach.  The great value of the DIY list is providing a
forum for all types of designs 
to be shared, so everyone can find what they want.

Using the Franco method doesn't alter the design considerations with
regards to FET switching time.  The goal is the same - discharge the
integrating cap as fast as possible.