analog storage sequencers

[John Speth]

At 04:18 AM 3/11/97 -0500, you wrote:
>
>>Would it be reasonably feasable to construct a sequencer that was a
>series of sample-and-holds, so that one could step through the
>sequence entering notes directly from a keyboard instead of dialing in
>pots?  
>
>I love the term "reasonably feasable!"
>
>My .02 worth would be a cheap A/D-latch-D/A. Possibly 1/2 a dual opamp input
>to a resistor pack to form an A/D then to something like a LS373 latch then
>to a DAC using the other half of the amp and another resistor pack. This
>wouldn't be the best, but it would only need a dual opamp, 1 latch and 2
>resistor packs per stage. Of course, there would be additional stuff for
>clearing the latch, etc.

I went through the exercise of designing a S/H based (instead of pot
settings) sequencer once.  I figured it would be best if you could sample
keyboard voltages (or whatever) instead of dialing it in (no fussing around
with a good pitch match).  My design was based on a single precision DAC, a
comparator, a counter, a little bit of RW memory, and a series of S/H's
that store the voltages.  

In a nutshell...  When you sample (or record), your DAC would operate in a
feedback configuration with a counter and comparator to make an ADC.  The
sampled data would then be stored in memory.  When you playback, you simply
output the S/H caps using a counter and an addressable N to 1 analog mux.
The key to this whole design is that when the S/H section is not being
used, some intelligent circuitry would refresh it from memory (droop
problem solved).

I will admit after I got done thinking this one through, I concluded that
en embedded CPU would be best used here instead of a lot of discrete logic.
 Maybe one of those programmable logic chips would be good too.  I don't
know how this fits into the the definition of "feasible" but I know the
refresh scheme works because I've built a circuit that uses it.

John Speth (johns at oei.com)
Object Engineering, Inc.
Vancouver, WA