Divider Question

[gstopp at fibermux.com]

     The XOR gate/flip flop idea in Electronotes is based on a general 
     solution to divide by "N" where "N" is any whole number. It involves 
     converting the number to binary and creating a chain of devices 
     matching the bits (MSB on the right) such that a "1" is a T-flip-flop 
     and a "0" is a T-flip-flop with an XOR on its input with feedback from 
     the last stage.
     
     Another generic symmetric division solution uses a shift register with 
     XOR gates for denominators of the form 2n-1.
     
     Neither one of these methods use RC time-dependent tricks. And Don is 
     right, both of these are from mid-70's issues of EDN.
     
     Tom is right about the potential glitches in the decode idea. One 
     possible way to fix that would be to keep the Karnaugh map solutions 
     but add a final parallel synchronizing latch for all outputs (one chip 
     per 8 outputs).
     
     Don Tillman writes:
     
     >
     >(I'm sorry Gene, but the EPROM idea is just plain warped.  Yeah, it's 
     >inexpensive, but jeeze....)
     >
     
     Bwooo hah hah hah ha.... given the opportunity, I will always proudly 
     confess that some of my ideas are warped. Mess with their brains, I 
     always say.
     
     - Gene
     gstopp at fibermux.com


______________________________ Reply Separator _________________________________
Subject: Re: Divider Question
Author:  Tom May <ftom at netcom.com> at ccrelayout
Date:    5/29/96 11:06 PM


gstopp at fibermux.com says:
     
>You can do this with discrete flip-flops and XOR gates, which can be 
>arranged to provide 50/50 symmetry waves for division by any 
>whole-number integer. You guessed it - once again I have stumbled 
>across an article on exactly this in an old issue of Electronotes.
     
As in using the XOR with one input connected to the input square wave 
and the other connected to an RC delayed version of the same wave to 
produce pulses on both the negative on positive edges of the input?
     
[... usage of flip-flops discussed ...]
     
>Alternately it may be possible to just use one or two cascaded 
>counters and decode the desired division waveforms from the counter 
>states. While this gives you guaranteed synchronization between 
>divider outputs from any starting point and count direction, it may 
>end up being a big mess of 8-input NAND gates and the like.
     
And a big mess of glitches unless you count in gray code or possibly 
include more terms than a Karnaugh-map minimization would have you 
believe.
     
Tom.