Divider Question

[gstopp at fibermux.com]

     You can do this with discrete flip-flops and XOR gates, which can be 
     arranged to provide 50/50 symmetry waves for division by any 
     whole-number integer. You guessed it - once again I have stumbled 
     across an article on exactly this in an old issue of Electronotes.
     
     Keep in mind that these dividers are asynchronous - in other words 
     they must all be lined up in the same inital state and cleanly clocked 
     without glitches in order to conform with the diagram you provide 
     below. If you use discrete FF's like the 7474 you can probably figure 
     out a way to do this with the preset/preclear inputs. Hopefully you 
     have one of those pin-matrix protoboards because I'd try it all first 
     before committing it to solder.
     
     Alternately it may be possible to just use one or two cascaded 
     counters and decode the desired division waveforms from the counter 
     states. While this gives you guaranteed synchronization between 
     divider outputs from any starting point and count direction, it may 
     end up being a big mess of 8-input NAND gates and the like.
     
     Yet another thing to do is use a counter clocking an EPROM that has 
     all the waveforms burned into it. This comes out to exactly two chips 
     but what you gain in ease of soldering, you loose in pain of prom 
     burning. You do have the opportunity to create quite strange and 
     custom (albiet hard-coded) waveforms this way also.
     
     Anyway, if you want to see the EN article I can fax it out.
     
     - Gene
     gstopp at fibermux.com


______________________________ Reply Separator _________________________________
Subject: Divider Question
Author:  Christopher List <Christopher_List at sonymusic.com> at ccrelayout
Date:    5/28/96 1:25 PM


I want a circuit which takes a pulse input and does the following division...
     
     <waveform chart deleted...>
     
I would like to get simultaneous outputs. Notice that the duty cycle of the 
output pulses is in line with the input, so this is not just "clock division" 
in terms of skipping "X" pulses.
     
I just wanted some advice from you more experienced chaps on what approach I 
should take in terms of elegance and simplicity. Should I build it up from 
discrete flip-flops? This is easy for the 2 and 4, but I'd need to work out the 
logic for the other divisions. Is there a 4000B series IC that I haven't found 
that'd be easier? Maybe a hybrid, flip-flops for the Div2, Div4, and Div6 and 
"4xxx" chips (4018?) for the Div3 and Div5?