Thoughts on Software Generated Envelopes

[Don Tillman]

   Date: Thu, 18 Jul 1996 16:36:50 +0000 ()
   From: "J.D. McEachin" <jdm at synthcom.com>

   My approach to situations like this where you're using too much CPU
   time has always been - hardware assist!  My solution is as follows:
   stick a small SRAM between the CPU and the SGE DAC.  The CPU can move
   a lot of SGE data into the SRAM at once, and then go away.  The DAC
   would read data out of the SRAM using a counter.  Multiplexing
   everything to provide multiple envelopes would be easy.  The CPU could
   generate values for linear, log, or inverse-log envelope shapes.

This sounds mighty kludgey.  

Is the response time to an interrupt really that slow on these CPUs? 
Exactly how many microseconds are we talking about?

[Aside: The Xerox Alto computer in the 70's, you know it as the main
influence behind the Macintosh, had this incredibly clever feature,
well it had a lot of incredibly clever features, but this one
particular feature was called Microtasking.  The CPU had extra
hardware to allow a zero-overhead task switch at the microcode level.
For instance, if you were in your 2nd microcycle of implementing a
branch-if-less-than instruction and an interrupt came by, the very
next microcycle and a bunch after it would service that interrupt, and
than the next microcycle after that would be the 3rd microcycle of
your branch instruction.  The reason for this was that cheap
video/disk/network controller chips didn't exist then, and this way
all the controller circuitry for these devices could be implemented in
microcode and be arbitrarily intelligent.  The Symbolics 3600 series
Lisp Machine (1982-1988) stole this feature.  Very cool.
Unfortunately nowadays there's no need for such heroic measures as 
controller chips provide all you need for pennies.  But in a situation
like this it would be really nice.]

But it got me thinking...

How about a semi-software generated envelope?  Specifically, the
envelope generator would consist of a DAC driving an integrator, and a
second DAC (along with the output of the integrator) driving a
comparator which, when goosed, flags an interrupt.  The microprocessor
would send out a command to the two DACs: ramp at rate R and
interrupt me when you hit voltage V, then I'll give you the next step
of the envelope.  Other bits could determine the shape of the ramp.

   -- Don