AW: Analog Shift Register design

Haible_Juergen#Tel2743 HJ2743 at
Wed Jan 24 19:10:00 CET 1996

>     The shift register used is a 74HCT164 8-stage serial-in parallel-out

Very good idea! If only I have thought of that! In my ASR I used separate
monoflops, 2 for each stage: one for the sample time, one for the gap to
the next stage. A pain to optimize time constants (using discrete S&H's,
I had to do much optimization!), changing everything 2n times ...
Your design is surely the better one!


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