SSM2020 VCA->what is "seque"?

chaosumb at chaosumb at
Fri Apr 12 20:02:09 CEST 1996

I've been working with the SSM2020 chip for about a month now , on and off,
trying to find a good schematic to put it to justice. First I built the one
in Barry Kleins book but it had a couple of problems like signal
feedthrough, unmatched CV levels and stuff since I tweaked the initial
design a bit too far. Then I got all excited about putting CV inverters
with a +5V offset on the inverted ADSR so that I could use the dual-VCA
feature as a voltage controlled panner; but alas I found  an Electronote
design around issue 120 i think which is a much better design since it
allows VCpanning on both VCA1 and VCA2; each SSM2020 VCA has 2 inputs and
two outputs. One is the VCAx-input and the other gets inverted
(VCAy-input). Then a left and right output (times2). I'm building this now
and I'll let everyone know how it goes. One thing I couldn't figure out is
the term "seque" as pertaining to panning in VCA's??? What's that?


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