Relay-switching Envelope Generator Issues

gstopp at gstopp at
Mon Nov 27 17:12:14 CET 1995

     Thanks for all the feedback on my recent EG experiments, especially 
     Juergen and Don for the constructive criticisms and alternative ideas. 
     I must admit that this relay-switching design does bug me a little, 
     for a couple reasons:
     1. Zero ohms means high discharge currents, and DIP relay contacts
        tend to open or fuse eventually (thanks JJS). This would be a 
        big bummer on stage for example. I'm not sure how to check if 
        I'm in the safe zone or not - the first thing that comes to mind 
        would be to drive the EG with an LFO and come back in a week or 
        two and see if it's still working.
     2. Back EMF - there's diodes in there, but will the 74HCT4002 gate
        outputs last forever? I'm not even using transistors right now.
     3. Power supply noise - haven't measured this, maybe not a problem.
     4. Audio clicking - should a synth module make mechanical noise?
     5. It's does not lend itself to voltage-control.
     However I thought it would be a good experiment because:
     1. It is easy to build. There are fewer solder connections in this
        design than any other ADSR (barring the chips of course). If you 
        can come up with an easier one, I would love to see it.
     2. It stimulates thinking on how an envelope generator SHOULD work.
     3. It stimulates conversation on the list (yay!)
     So all you builders who got excited over this - take heed! Treat it as an 
     experiment. The main thing I was after initially was low parts count 
     combined with complete tweakability of all parameters, with ideal time 
     constant ranges. This was accomplished. I think the main key to the 
     simplicity is the use of double-throw switches. Here's the idea:
     When the envelope is in one of the dynamic phases it is either charging or 
     discharging. When it is charging it is to V+. When it is discharging it is 
     either discharging to the sustain voltage (decay), or to ground (release). 
     Therefore you can use two SPDT switches cascaded. The first switches the 
     integrating cap to V+ (thru an R), or to the other switch, which switches 
     between the sustain voltage or ground (thru an R). This of course assumes 
     that the traditional ADSR shape is desired.
     Anyway first thing I did this morning was to run to the CMOS databook and 
     look up the 4053 - yup, it has individual control on all three of its SPDT 
     analog switches. More to follow....
     - Gene
     gstopp at

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