PLL Freq Mult Ver 2 (Still prelim) text
Don Tillman
don at till.com
Sun Aug 27 18:14:33 CEST 1995
Date: Sat, 26 Aug 1995 12:56:51 -0700
From: chordman at ix.netcom.com (Scott Gravenhorst, Synthaholic)
P R E L I M I N A R Y
VERSION 2
PLL FREQUENCY MULTIPLIER MODULE Scott R. Gravenhorst
Some comments...
You can't connect TTL and CMOS directly. Well you *can*, but the
minimum TTL high output voltage is 2.5v and the minimum CMOS high
input is 3.5v. It may work in your particular instance, but the specs
aren't being met so it won't work reliably.
Best to use CMOS for the digital stuff too. It's output is also much
more compatible with the analog world as it swings the full power
supply range.
The 4046 will take, and run better at, a power supply of up to 18
volts. Best to run it at 15 volts, off the analog supply.
The reset switch is only there to deal with the 74164 powering up in
any of several random states, right? I mean as opposed to a musical
use. It's wrong to have the user deal with such a thing. You could
have a power-on reset cap, but there would still be random states
induced as you switch between Ns. Best to use a counter instead of a
shift register. It'll also save you that extra inverter.
Changing the N divider is problematic because it also changes the loop
characteristics, so the user ends up tweaking both the N and VCO
freqency controls in a nonintuitive way. Best to leave the divider
constant and tap off multiple divide-by signals for the output.
You'll want to buffer all signals before they hit the outside world.
Switching a binary collection of capacitors isn't a good user
interface. Better to just throw a pot at the VCO input; the effect is
the same.
I can't help but wonder what a dozen of these guys strung in series
would sound like.
-- Don
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