[sdiy] Using dual BBD chips for higher clock frequency

Terry Bowman ka4hjh at gmail.com
Wed Jun 22 01:07:17 CEST 2022

> On Jun 16, 2022, at 7:38 PM, Tom Wiltshire <tom at electricdruid.net> wrote:
> I think this is what's referred to in the SAD1024 datasheet. That chip was actually a dual 512-stage device, and one suggestion was to use the two delay lines in parallel for reduced noise. I don't remember the details.

IIRC, one reason that 1024s usually have two 512s is so that you can clock them separately for a lush chorus. Modulate one clock with a triangle wave and the other with the wave inverted. The PAiA string keyboard did this. There's a web site somewhere that has all of the variations used in string synths, the Dimension D and so on.

I suppose you could run one at the highest possible frequency/shortest delay time and have the second, modulated BBD in parallel. That would make flanging with insanely high frequency peaks/notches possible. Or something like that. Has anyone tried it?

> I found an "Archer"-branded version of the datasheet here which shows various possibilities:

Heh. My copy is around here somewhere.

Terry Bowman, KA4HJH
"The Mac Doctor"


“...the book said something astonishing, a very big thought. The stars, it said, were suns but very far away. The Sun was a star but close up.”—Carl Sagan, "The Backbone Of Night", Cosmos, 1980

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