[sdiy] My new dotcom module.. M114 Dual CV-GATE delay

brianw brianw at audiobanshee.com
Fri Dec 2 23:47:28 CET 2022

It depends upon how the delay is implemented.

With many early, discrete digital delays, the delay time was controlled by altering the sample rate. Thus, the recording always moves forward, and the delay is always a fixed number of samples, so the delay time is determined by the rate that the fixed number of samples go by. Depending upon the circuit, the sample rate might be continuously variable or discrete steps. Changes to sample rate can briefly cause a pitch shift.

This is a fixed sample rate delay, so the delay time is a factor of the number of samples between input and output. Changing delay time requires a change in the number of samples between input and output - but that will most likely cause a discontinuity in the signal unless things are muted during the change. There are a few options: change the record head, change the playback head, or perhaps change both. Then, there's the option to make the delay time change all at once (discontinuity with no pitch shift), or to make small adjustments over time to minimize any discontinuity (which would cause a pitch shift until the adjustments are complete).

Probably the only way to scratch backwards in time would be to modify the playback head only, and to modify it slowly over time. Otherwise it's just going to click-jump to the new delay.


On Dec 2, 2022, at 1:37 PM, Mattias Rickardsson <mr at analogue.org> wrote:
> Interesting... So, can you "scratch" back and forth on the delay time knob in order to go back and forth in recorded time? :-)
> /mr
> Den tors 20 maj 2021 23:52Jean-Pierre Desrochers <jpdesroc at oricom.ca> skrev:
>> Hi all,
>> After some 6 months of hard work and with the precious help
>> of Roman Sowa (member of this DIY forum) I finally went through
>> the final tests and am very happy to introduce my new born M114
>> which is a Dual 2msec to 10sec CV-GATE delay.
>> Whatever CV/GATE comes in will be stored and sent back
>> with a specific dialled delay.
>> All this design’s traffic is made around talking SPI devices which are:
>> - 1 x 64k x 8 SPI SRAM
>> - 2 x 16 bits SPI ADC
>> - 2 x 16 bits SPI DAC
>> Storing the incoming GATE pulses and restoring them delayed was easy task,
>> but the most tedious part was to actually store the 2 incoming 
>> CV voltages in 16bits chunks without losing any precision.
>> Well Roman Sowa came with a nice design of 2 SIP modules
>> that did the ADC and DAC conversion within +/1 LSB precision.
>> You can see some pictures below..
>> And.. as usual this is an open source project so all the needed files are available HERE.
>> Enjoy !
>> Jean-Pierre

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