[sdiy] My new dotcom module.. M114 Dual CV-GATE delay

[Jean-Pierre Desrochers]

Thank You !

The special thing about this module is the possibility to delay both CV/Gate
BUT using a delayed sound that is patched differently and that uses more oscillator/filters
than the original incoming one..
For example: 
Incoming:  3 notes tuned in major, square waves
Delayed: 6 notes tuned completely differently using different waveforms, ADSR settings, etc..
The result with a 1 sec delay is very special...



> -----Message d'origine-----
> De : brianw <brianw at audiobanshee.com>
> Envoyé : 2 décembre 2022 16:03
> À : Jean-Pierre Desrochers <jpdesroc at oricom.ca>
> Cc : Synth-diy at synth-diy.org
> Objet : Re: [sdiy] My new dotcom module.. M114 Dual CV-GATE delay
> 
> Very interesting!
> 
> I almost designed a module somewhat similar to this, but never quite got the
> design completed.
> 
> I found your full product description here:
> 
> http://www.arcenson.com/projects/Modular/M114_CV-
> GATE_DELAY/Specifications/M114_Dual_CV-GATE_DELAY_specs.pdf
> 
> ... and it seems like the CV can vary - both while Gate is active, and also while
> Gate is inactive - and the CV output will be a delayed reproduction of the CV
> input (given the 1 kHz sample rate and presumed bandwidth limitation to 500
> Hz or less). I like this. One of the challenges with my design that I was
> considering was to create a pure delay without any assumptions about the
> state of the Gate during CV changes.
> 
> Kudos.
> 
> Brian
> 
> 
> On May 20, 2021, at 2:51 PM, Jean-Pierre Desrochers <jpdesroc at oricom.ca>
> wrote:
> > Hi all,
> >
> > After some 6 months of hard work and with the precious help of Roman
> > Sowa (member of this DIY forum) I finally went through the final tests
> > and am very happy to introduce my new born M114 which is a Dual 2msec
> > to 10sec CV-GATE delay.
> > Whatever CV/GATE comes in will be stored and sent back with a specific
> > dialled delay.
> > All this design’s traffic is made around talking SPI devices which are:
> > - 1 x 64k x 8 SPI SRAM
> > - 2 x 16 bits SPI ADC
> > - 2 x 16 bits SPI DAC
> >
> > Storing the incoming GATE pulses and restoring them delayed was easy
> > task, but the most tedious part was to actually store the 2 incoming
> > CV voltages in 16bits chunks without losing any precision.
> > Well Roman Sowa came with a nice design of 2 SIP modules that did the
> > ADC and DAC conversion within +/1 LSB precision.
> > You can see some pictures below..
> > And.. as usual this is an open source project so all the needed files are
> available HERE.
> >
> > Enjoy !
> > Jean-Pierre