[sdiy] 1-bit ADC for audio/audio delay

rsdio at audiobanshee.com rsdio at audiobanshee.com
Wed Apr 13 21:21:50 CEST 2016


I noticed that the article doesn't specify the clock frequency that matches the RC values given. What clock frequency are you using? As Dave says, the correct values are very dependent upon the frequency.


On Apr 12, 2016, at 2:55 PM, David Moylan <dave at westphila.net> wrote:
> There are some issues with sigma delta to remember:
> On a 1 bit converter it takes a whole lot of oversampling to achieve a high equivalent bit depth.  If I recall a single order integrator gives optimum 1.5 bits for every doubling of frequency, second order is 2.5. Somebody google that for me... :)
> The RC filter in the feedback path determines the transition frequency of the noise shaping.  The thought then would be that you want that transition frequency to be as high as possible so that the noise is shaped to boost frequencies way beyond the cutoff frequency of the reconstruction filter but there are other concerns.  If the RC time constant is too small you can saturate the filter.  I saw a reference that said optimum RC (for a true integrator) is 1/RC = f, where f is the sampling frequency, but was unable to see the original source which is an expensive text book:
> Continuous-Time Sigma-Delta A/D Conversion: Fundamentals, Performance Limits and Robust Implementations, Gerfers & Ortmanns
> In my experiments I felt like I was still getting saturation with those values and increased the capacitor value a bit, and also degraded the maximum gain of my integrator.
> On 04/11/2016 06:12 PM, Tom Wiltshire wrote:
>> One further thing: I couldn't get the RC values provided in the article to work at all. They suggest "The output of the comparator (Point B) is integrated by Rx, Cx (typically 10 Ω, and 0.01 µF)" but I finished up using 100K and 4n7 to get a better result. This is so different that something fishy is going on.
>> On 11 Apr 2016, at 22:59, Tom Wiltshire <tom at electricdruid.net> wrote:
>>> 	http://electronicdesign.com/analog/low-cost-audio-delay-line-uses-1-bit-adc
>>> Everyone likes a simple audio delay, right? And you can't get much simpler for a digital delay than that, so I thought it'd be worth playing with. Note that the image in the original article has an error and takes the feedback from the wrong place, after the comparator instead of after the latch. My image is corrected.
>>> Now, the circuit works well enough, but it doesn't work as well as I'd expected. For now, I've got no shift register. I'm just doing the ADC, then feeding the bits out again so I can compare input and output signals for quality. I've done lots of experiments with PWM audio output, and I've got better results than I'm getting out of this. And this *should* work better than PWM, since the "PDM" output it produces should have less jitter than a PWM output would.
>>> In practice, it's quiet with no signal going in (what would be the worst case for PWM - the midpoint voltage) but when it gets a signal, there's a substantial amount of background white(ish) noise. Now, I understand that it's never going to be hi-fi (that's not the point) but I don't understand why I should get more noise with a signal than without.

More information about the Synth-diy mailing list