VCOs & Tempco

KA4HJH terrymbowman at
Thu May 14 19:39:35 CEST 1998

>If you're using a microprocessor anyway, what about "hybrid" envelope
>generators? The analog hardware is just a processor-controlled resistor
>(a Xicor chip maybe), a capacitor and two comparators. One processor
>generated control voltage (being the "asymptote" level) charges the cap
>via the resistor. The comparators are fed with another control voltage,
>the threshold level. They detect if the voltage across the cap is
>higher/lower than the threshold, and if it is, a processor interrupt is
>generated. Then the processor sets new values for resistance, asymptote
>and threshold.
>This is much more flexible than conventional ADSRs, since you can have
>as many envelope stages you like, even loops, and the threshold and the
>asymptote can be set independently. Still you need only three analog
>outputs per EG for the processor.
>The processor is only needed when another envelope stage begins. The
>minimum envelope rate is not determined by processor speed. If the
>processor doesn't react fast enough, only the thresholds will be
>affected, not the rates.
>A linear EG could be implemented in a similar manner, using a processor
>controlled current source instead of a controlled resistor.
>Any comments on this?

I was thinking about this approach not too long ago. It sounds great
especially if you're using a small microncontroller, but what's the
resolution on the digitally-controlled resistor? How many bits do you
really need for an EG? If you were to do this entirely digitally, could you
use a cheapo DAC like a resistor ladder? How many bits could you get away
with? I wouldn't think the sampling rate for an EG wouldn't have to be very
high, either.

Terry Bowman, KA4HJH
"The Mac Doctor"

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