DIY Digital Scanning Keyboard (Cor Blimey!)
The Old Crow
oldcrow at Access.Mountain.Net
Mon Feb 19 19:34:52 CET 1996
On Mon, 19 Feb 1996, Clive Jones wrote:
> Okay then - since Digisound nicked my Digital note generator design and
> I'm sueing the pants off them (just kidding), I've just come up with
> (literally!) a digital keyboard which is self scanning and requires no uP
> overhead. The design outputs an 8 bit data word representing the keys
> "down", no key down=word value of 00h, it's all theory as I do more of
> this than wave a soldering iron around nowadays, but, I see no reason why
> this should'nt work.
This is going strictly from memory, but the Paia `8780' keyboard scanning
circuit does almost exactly what you describe below, save for the RAM part.
I'll note the differences.
> 1 - Build a clock circuit around 500khz, this should scan each key on a
> 64 (yep, I know it should be 61 but 8x8 - yes?) keyboard every 7.8Khz,
> plenty of time! The keyboard scan will occur every *other* event, the
> non-keyboard scan event time or "blanking" period will be used for the
> interface device to access the scan results from RAM e.g scan keyboard,
> rest (one full keyboard scan event time - read results), scan
The 8780 used a master clock to drive a 4024 counter, which has a 7-bit
output. The MSB was used to flag an `active' or `dummy' scan of the
keyboard; the lower 6 bits were used to drive the scanning matrix.
> 2 - Build an 8x8 scanning circuit, use two 4017 johnson counters - 1 to
> drive the *rows* and 1 to drive the *columns* - you'll need to buffer the
Those lower six bits were split into two 3-bit groups. One to drive the
binary select inputs on a 4051 for the `row' matrix, the other driving the
select inputs of the `column' matrix. The 4051s' eight selected analog I/Os
were connected to the keyboard in an 8x8 standard fashion with 5 notes for
the final row group (61 keys.) 61 isolation diodes were also used (and
arranged along the bottom of the encoder PCB.)
> gate to prevent it going into orbit. The output of this nand gate could
> be used to trigger a gate voltage generator (you couldn't do it directly
> as it's "on" pulse would be so short you couldn't trigger an EG with
The key down pulse for a given key was done by connecting the analog
switch common I/O pin of one 4051 to ground, the other analog switch common
I/O pin, with a pull-up attached, went to the I/O connector--this signal
would drop low for one key-scan period for each key found down.
The encoder output looked like this:
D7 -- active/dummy scan flag, low=active
D6 -- key down flag, low=active
D4 -- decoder column bits (also go to `column' 4051)
D1 -- decoder row bits (also go to `row' 4051)
This presents the scan status, key status and key number to whatever
device was attached.
> Okay following so far?
> 3 - Addressing the memory: Whilst all this is going on the 555 is also
There was no external RAM circuit used for the 8780; the encoder's
output port (above) was simply connected to either a DAC & S/H circuit
(along with a small mod where pressing a key would stop the encoder clock
by routing the key down signal line to the `gating' input of the master
clock. Look in a Forrest Mims notebook under the 4011 IC for an example.)
OR the encoder output port was attached to a computer's input port. The
computer was responsible for reading the keyboard port and buffering key
it found down on active scans.
(Did I get that right, John? :)
/* Paia Fatman LFO mod: http://www.mcs.com/~syzygy/webdoc/lfomod.html */
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